A life of a semiconductor switching element with high breakedown voltage can be predicted by detecting a junction temperature of the semiconductor switching element. A gate resistance of the semiconductor switching element is increased along with an increase in a temperature of the semiconductor switching element. Accordingly, when the gate resistance of the semiconductor switching element is detected, the temperature of the semiconductor switching element is estimated, thereby enabling the life of the semiconductor switching element to be predicted.
There is a technique of inputting a sine wave current to a gate terminal of the semiconductor switching element to detect a gate voltage, and calculating a gate resistance based on the detected gate voltage. The influence of parasitic inductor and parasitic capacitor can be ignored by inputting the sine wave current having the same frequency as the resonant frequency determined by the parasitic inductor and the parasitic capacitor of a gate electrode. The voltage across the gate resistance is amplified to convert the amplified voltage into a DC (Direct Current) voltage by a detection circuit, and the DC voltage is further amplified, whereby the voltage across the gate resistance is read. The value of the gate resistance can be calculated based on the read voltage.
However, in this technique, it is necessary to measure a gate parasitic inductance in advance, which makes the process cumbersome. Furthermore, a circuit configured to input a sine wave current is additionally needed, thereby causing a circuit area to be increased.
There is also a technique of inputting a pulse current to the gate terminal of the semiconductor switching element with high breakdown voltage. In this technique, a gate voltage having a trapezoid wave is measured at two points of time, such a gate voltage being generated due to the parasitic capacitor and the parasitic resistance, and is AD-converted. Both of the gate resistance and the input current are calculated based on the AD-converted voltage. In this technique, if the parasitic capacitor of the semiconductor switching element is known, the gate resistance can be calculated even when a current value of the pulse current is unknown.
However, in this technique, since the gate voltage detected at two points of time need to be directly AD-converted, an ADC (Analog to Digital Converter) with high effective resolution is needed to improve the calculation accuracy of the gate resistance value. Furthermore, a circuit configured to input a current is additionally needed, thereby causing a circuit area to be increased.